Bits Mapping in Triple-level-cell (TLC) Charge-trap (CT) 3D NAND Flash Memory and its Applications to IoT Security - researchr publication authors

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Yifang Xi, Xiaotong Fang, Yachen Kong, Yifan Guo, Hongzhe Lin, Xuepeng Zhan, Jiezhi Chen. Bits Mapping in Triple-level-cell (TLC) Charge-trap (CT) 3D NAND Flash Memory and its Applications to IoT Security. In 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021. pages 69-71, IEEE, 2021. [doi]

This author has not been identified. Look up 'Yifang Xi' in GoogleThis author has not been identified. Look up 'Xiaotong Fang' in GoogleThis author has not been identified. Look up 'Yachen Kong' in GoogleThis author has not been identified. Look up 'Yifan Guo' in GoogleThis author has not been identified. Look up 'Hongzhe Lin' in GoogleThis author has not been identified. Look up 'Xuepeng Zhan' in GoogleThis author has not been identified. Look up 'Jiezhi Chen' in Google

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