Bits Mapping in Triple-level-cell (TLC) Charge-trap (CT) 3D NAND Flash Memory and its Applications to IoT Security

Yifang Xi, Xiaotong Fang, Yachen Kong, Yifan Guo, Hongzhe Lin, Xuepeng Zhan, Jiezhi Chen. Bits Mapping in Triple-level-cell (TLC) Charge-trap (CT) 3D NAND Flash Memory and its Applications to IoT Security. In 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021. pages 69-71, IEEE, 2021. [doi]

@inproceedings{XiFKGLZC21,
  title = {Bits Mapping in Triple-level-cell (TLC) Charge-trap (CT) 3D NAND Flash Memory and its Applications to IoT Security},
  author = {Yifang Xi and Xiaotong Fang and Yachen Kong and Yifan Guo and Hongzhe Lin and Xuepeng Zhan and Jiezhi Chen},
  year = {2021},
  doi = {10.1109/ICTA53157.2021.9661687},
  url = {https://doi.org/10.1109/ICTA53157.2021.9661687},
  researchr = {https://researchr.org/publication/XiFKGLZC21},
  cites = {0},
  citedby = {0},
  pages = {69-71},
  booktitle = {2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-1747-1},
}