Power Consumption Analysis of Flip-flop Based Interconnect Pipelining

Jingye Xu, Abinash Roy, Masud H. Chowdhury. Power Consumption Analysis of Flip-flop Based Interconnect Pipelining. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 3716-3719, IEEE, 2007. [doi]

Abstract

Abstract is missing.