Optimal Loop Tiling for Minimizing Write Operations on NVMs with Complete Memory Latency Hiding - researchr publication authors

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Rui Xu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yuhong Song, Jingzhi Lin. Optimal Loop Tiling for Minimizing Write Operations on NVMs with Complete Memory Latency Hiding. In 27th Asia and South Pacific Design Automation Conference, ASP-DAC 2022, Taipei, Taiwan, January 17-20, 2022. pages 389-394, IEEE, 2022. [doi]

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