Low-power loop pipelining mapping onto CGRA utilizing variable dual VDD - researchr publication authors

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Bing Xu, Shouyi Yin, Leibo Liu, Shaojun Wei. Low-power loop pipelining mapping onto CGRA utilizing variable dual VDD. In IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014. pages 242-245, IEEE, 2014. [doi]

This author has not been identified. Look up 'Bing Xu' in GoogleThis author has not been identified. Look up 'Shouyi Yin' in GoogleThis author has not been identified. Look up 'Leibo Liu' in GoogleThis author has not been identified. Look up 'Shaojun Wei' in Google

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