Low-power loop pipelining mapping onto CGRA utilizing variable dual VDD

Bing Xu, Shouyi Yin, Leibo Liu, Shaojun Wei. Low-power loop pipelining mapping onto CGRA utilizing variable dual VDD. In IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014. pages 242-245, IEEE, 2014. [doi]

@inproceedings{XuYLW14,
  title = {Low-power loop pipelining mapping onto CGRA utilizing variable dual VDD},
  author = {Bing Xu and Shouyi Yin and Leibo Liu and Shaojun Wei},
  year = {2014},
  doi = {10.1109/MWSCAS.2014.6908397},
  url = {https://doi.org/10.1109/MWSCAS.2014.6908397},
  researchr = {https://researchr.org/publication/XuYLW14},
  cites = {0},
  citedby = {0},
  pages = {242-245},
  booktitle = {IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-4134-6},
}