A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS

Benwei Xu, Yuan Zhou, Yun Chiu. A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]

Authors

Benwei Xu

This author has not been identified. Look up 'Benwei Xu' in Google

Yuan Zhou

This author has not been identified. Look up 'Yuan Zhou' in Google

Yun Chiu

This author has not been identified. Look up 'Yun Chiu' in Google