A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS

Benwei Xu, Yuan Zhou, Yun Chiu. A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]

@inproceedings{XuZC16-0,
  title = {A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS},
  author = {Benwei Xu and Yuan Zhou and Yun Chiu},
  year = {2016},
  doi = {10.1109/VLSIC.2016.7573535},
  url = {http://dx.doi.org/10.1109/VLSIC.2016.7573535},
  researchr = {https://researchr.org/publication/XuZC16-0},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-0635-9},
}