Makoto Yabuuchi, Yohei Sawada, Toshiaki Sano, Yuichiro Ishii, Shinji Tanaka, Miki Tanaka, Koji Nii. 2 16-nm FinFET double pumping 1W1R 2-port SRAM with 313 ps read access time. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]
@inproceedings{YabuuchiSSITTN16,
title = {2 16-nm FinFET double pumping 1W1R 2-port SRAM with 313 ps read access time},
author = {Makoto Yabuuchi and Yohei Sawada and Toshiaki Sano and Yuichiro Ishii and Shinji Tanaka and Miki Tanaka and Koji Nii},
year = {2016},
doi = {10.1109/VLSIC.2016.7573460},
url = {http://dx.doi.org/10.1109/VLSIC.2016.7573460},
researchr = {https://researchr.org/publication/YabuuchiSSITTN16},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016},
publisher = {IEEE},
isbn = {978-1-5090-0635-9},
}