A multi-functional memory unit with PLA-based reconfigurable decoder

Nobuyuki Yahiro, Bo Liu, Atsushi Nanri, Shigetoshi Nakatake, Yasuhiro Takashima, Gong Chen. A multi-functional memory unit with PLA-based reconfigurable decoder. In Peter M. Athanas, René Cumplido, Claudia Feregrino, Ron Sass, editors, International Conference on ReConFigurable Computing and FPGAs, ReConFig 2016, Cancun, Mexico, November 30 - Dec. 2, 2016. pages 1-7, IEEE, 2016. [doi]

@inproceedings{YahiroLNNTC16,
  title = {A multi-functional memory unit with PLA-based reconfigurable decoder},
  author = {Nobuyuki Yahiro and Bo Liu and Atsushi Nanri and Shigetoshi Nakatake and Yasuhiro Takashima and Gong Chen},
  year = {2016},
  doi = {10.1109/ReConFig.2016.7857145},
  url = {http://dx.doi.org/10.1109/ReConFig.2016.7857145},
  researchr = {https://researchr.org/publication/YahiroLNNTC16},
  cites = {0},
  citedby = {0},
  pages = {1-7},
  booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig 2016, Cancun, Mexico, November 30 - Dec. 2, 2016},
  editor = {Peter M. Athanas and René Cumplido and Claudia Feregrino and Ron Sass},
  publisher = {IEEE},
  isbn = {978-1-5090-3707-0},
}