H. Yamada, T. Hotta, T. Nishiyama, F. Murabayashi, T. Yamauchi, H. Sawamoto. A 13.3ns double-precision floating-point ALU and multiplier. In 1995 International Conference on Computer Design (ICCD 95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings. pages 466, IEEE Computer Society, 1995. [doi]
@inproceedings{YamadaHNMYS95,
title = {A 13.3ns double-precision floating-point ALU and multiplier},
author = {H. Yamada and T. Hotta and T. Nishiyama and F. Murabayashi and T. Yamauchi and H. Sawamoto},
year = {1995},
url = {http://computer.org/proceedings/iccd/7165/71650466abs.htm},
researchr = {https://researchr.org/publication/YamadaHNMYS95},
cites = {0},
citedby = {0},
pages = {466},
booktitle = {1995 International Conference on Computer Design (ICCD 95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings},
publisher = {IEEE Computer Society},
isbn = {0-8186-7165-3},
}