Kodai Yamada, Haruki Maruoka, Jun Furuta, Kazutoshi Kobayashi. Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI process. In IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018. pages 3-1, IEEE, 2018. [doi]
@inproceedings{YamadaMFK18,
title = {Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI process},
author = {Kodai Yamada and Haruki Maruoka and Jun Furuta and Kazutoshi Kobayashi},
year = {2018},
doi = {10.1109/IRPS.2018.8353691},
url = {https://doi.org/10.1109/IRPS.2018.8353691},
researchr = {https://researchr.org/publication/YamadaMFK18},
cites = {0},
citedby = {0},
pages = {3},
booktitle = {IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018},
publisher = {IEEE},
isbn = {978-1-5386-5479-8},
}