90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique

Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki, Yasuhisa Shimazaki, Koji Nii, Shigeru Shimada, Kazumasa Yanagisawa, Takayuki Kawahara. 90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique. J. Solid-State Circuits, 41(3):705-711, 2006. [doi]

Abstract

Abstract is missing.