Nobuyuki Yamashita, Tohru Kimura, Yoshihiro Fujita, Yoshiharu Aimoto, Takashi Manabe, Shin'ichiro Okazaki, Kazuyuki Nakamura, Masakazu Yamashina. A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM. J. Solid-State Circuits, 29(11):1336-1343, November 1994. [doi]
Abstract is missing.