A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 /spl mu/A/MB data-retention current

Hiroyuki Yamauchi, Tom Iwata, Akito Uno, Masanori Fukumoto, Tsutomu Fujita. A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 /spl mu/A/MB data-retention current. J. Solid-State Circuits, 30(11):1174-1182, November 1995. [doi]

@article{YamauchiIUFF95,
  title = {A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 /spl mu/A/MB data-retention current},
  author = {Hiroyuki Yamauchi and Tom Iwata and Akito Uno and Masanori Fukumoto and Tsutomu Fujita},
  year = {1995},
  month = {November},
  doi = {10.1109/4.475704},
  url = {https://doi.org/10.1109/4.475704},
  researchr = {https://researchr.org/publication/YamauchiIUFF95},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {30},
  number = {11},
  pages = {1174-1182},
}