A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 /spl mu/A/MB data-retention current

Hiroyuki Yamauchi, Tom Iwata, Akito Uno, Masanori Fukumoto, Tsutomu Fujita. A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 /spl mu/A/MB data-retention current. J. Solid-State Circuits, 30(11):1174-1182, November 1995. [doi]

Abstract

Abstract is missing.