Jin-Tai Yan. Assignment of inter-die signals in a simplified wiring model for die-stacking SiP designs. Integration, 49:78-86, 2015. [doi]
@article{Yan15a,
title = {Assignment of inter-die signals in a simplified wiring model for die-stacking SiP designs},
author = {Jin-Tai Yan},
year = {2015},
doi = {10.1016/j.vlsi.2014.12.007},
url = {http://dx.doi.org/10.1016/j.vlsi.2014.12.007},
researchr = {https://researchr.org/publication/Yan15a},
cites = {0},
citedby = {0},
journal = {Integration},
volume = {49},
pages = {78-86},
}