Via-Avoidance-Oriented Interposer Routing for Layer Minimization in 2.5-D IC Designs

Jin-Tai Yan. Via-Avoidance-Oriented Interposer Routing for Layer Minimization in 2.5-D IC Designs. IEEE Trans. VLSI Syst., 29(11):1889-1902, 2021. [doi]

Abstract

Abstract is missing.