Jin-Tai Yan, Zhi-Wei Chen. Assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. In José Luis Ayala, Alex K. Jones, Patrick H. Madden, Ayse Kivilcim Coskun, editors, Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013. pages 203-208, ACM, 2013. [doi]
Abstract is missing.