Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs

Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma 0003, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer. Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. In Kia Bazargan, Stephen Neuendorffer, editors, Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019, Seaside, CA, USA, February 24-26, 2019. pages 23-32, ACM, 2019. [doi]

@inproceedings{YangHWZ0GBLVWK19,
  title = {Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs},
  author = {Yifan Yang and Qijing Huang and Bichen Wu and Tianjun Zhang and Liang Ma 0003 and Giulio Gambardella and Michaela Blott and Luciano Lavagno and Kees A. Vissers and John Wawrzynek and Kurt Keutzer},
  year = {2019},
  doi = {10.1145/3289602.3293902},
  url = {https://doi.org/10.1145/3289602.3293902},
  researchr = {https://researchr.org/publication/YangHWZ0GBLVWK19},
  cites = {0},
  citedby = {0},
  pages = {23-32},
  booktitle = {Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019, Seaside, CA, USA, February 24-26, 2019},
  editor = {Kia Bazargan and Stephen Neuendorffer},
  publisher = {ACM},
  isbn = {978-1-4503-6137-8},
}