Low-power floating bitline 8-T SRAM design with write assistant circuits - researchr publication authors

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Hao-I Yang, Ssu-Yun Lai, Wei Hwang. Low-power floating bitline 8-T SRAM design with write assistant circuits. In 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings. pages 239-242, IEEE, 2008. [doi]

This author has not been identified. Look up 'Hao-I Yang' in GoogleThis author has not been identified. Look up 'Ssu-Yun Lai' in GoogleThis author has not been identified. Look up 'Wei Hwang' in Google

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