Low-power floating bitline 8-T SRAM design with write assistant circuits

Hao-I Yang, Ssu-Yun Lai, Wei Hwang. Low-power floating bitline 8-T SRAM design with write assistant circuits. In 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings. pages 239-242, IEEE, 2008. [doi]

Abstract

Abstract is missing.