Hyeokjoon Yang, Hyunbae Lee, Hanseul Kim, Sangwook Park, Jinwook Burm. A 12-b 2 MS/s R-C Two-Step SAR ADC with Bit-Cycling Time Control and LSB Correction Logic. In International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020. pages 238-239, IEEE, 2020. [doi]
Abstract is missing.