A 33.6-136.2-TOPS/W Nonlinear Analog Computing-in-Memory Macro for Multi-Bit LSTM Accelerator in 65-nm CMOS - researchr publication

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Junyi Yang, Xinyu Luo, Ye Ke, Zheng Wang 0027, Hongyang Shang, Shuai Dong, Zhengnan Fu, Xiaofeng Yang 0004, Hongjie Liu, Arindam Basu. A 33.6-136.2-TOPS/W Nonlinear Analog Computing-in-Memory Macro for Multi-Bit LSTM Accelerator in 65-nm CMOS. J. Solid-State Circuits, 61(7):3704-3717, July 2026. [doi]

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