Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures

Y. Yang, R. Labie, F. Ling, C. Zhao, A. Radisic, Jan Van Olmen, Youssef Travaly, Bert Verlinden, Ingrid De Wolf. Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures. Microelectronics Reliability, 50(9-11):1636-1640, 2010. [doi]

Abstract

Abstract is missing.