Youssef Travaly - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 11 from 11

2011

In-tier diagnosis of power domains in 3D TSV ICsYuuki Araga, Makoto Nagata, Geert Van der Plas, Jaemin Kim, Nikolaos Minas, Pol Marchal, Youssef Travaly, Michael Libois, Antonio La Manna, Wenqi Zhang, Eric Beyne. 3dic 2012: 1-6 [doi]

2010

A novel concept for ultra-low capacitance via-last TSVYann Civale, Marcel Gonzalez, Deniz Sabuncuoglu Tezcan, Youssef Travaly, Philippe Soussan, Eric Beyne. 3dic 2010: 1-4 [doi]

300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applicationsAnne Jourdain, Thibault Buisson, Alain Phommahaxay, Mark Privett, Dan Wallace, Sumant Sood, Peter Bisson, Eric Beyne, Youssef Travaly, Bart Swinnen. 3dic 2010: 1-4 [doi]

Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architecturesY. Yang, R. Labie, F. Ling, C. Zhao, A. Radisic, Jan Van Olmen, Youssef Travaly, Bert Verlinden, Ingrid De Wolf. mr, 50(9-11):1636-1640, 2010. [doi]

2009

TSV metrology and inspection challengesRamakanth Alapati, Youssef Travaly, Jan Van Olmen, Ricardo Cotrin Teixeira, Jan Vaes, Marc van Cauwenbergh, Anne Jourdain, Greet Verbinnen, Gino Marcuccilli, Glenn Florence, Shay Wolfling, Christine Pelissier, Haiping Zhang, Jaydeep Sinha, Andreas Machura, Irfan Malik. 3dic 2009: 1-4 [doi]

Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumpingYann Civale, Deniz Sabuncuoglu Tezcan, Harold G. G. Philipsen, P. Jaenen, R. Agarwal, F. Duval, Philippe Soussan, Youssef Travaly, Eric Beyne. 3dic 2009: 1-4 [doi]

3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV)Jan Van Olmen, Jan Coenen, Wim Dehaene, Kristin De Meyer, Cedric Huyghebaert, Anne Jourdain, Guruprasad Katti, Abdelkarim Mercha, Micha Rakowski, Michele Stucchi, Youssef Travaly, Eric Beyne, Bart Swinnen. 3dic 2009: 1-5 [doi]

2006

Impact of interconnect resistance increase on system performance of low power and high performance designsMandeep Bamal, Youssef Travaly, Wenqi Zhang, Michele Stucchi, Karen Maex. slip 2006: 85-90 [doi]

Sign in or sign up to see more results.