Lei Yang, Manyuan Shen, Hui Liu, C.-J. Richard Shi. An FPGA implementation of low-density parity-check code decoder with multi-rate capability. In Ting-Ao Tang, editor, Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005. pages 760-763, ACM Press, 2005. [doi]
@inproceedings{YangSLS05,
title = {An FPGA implementation of low-density parity-check code decoder with multi-rate capability},
author = {Lei Yang and Manyuan Shen and Hui Liu and C.-J. Richard Shi},
year = {2005},
doi = {10.1145/1120725.1121011},
url = {http://doi.acm.org/10.1145/1120725.1121011},
tags = {C++},
researchr = {https://researchr.org/publication/YangSLS05},
cites = {0},
citedby = {0},
pages = {760-763},
booktitle = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005},
editor = {Ting-Ao Tang},
publisher = {ACM Press},
isbn = {0-7803-8737-6},
}