Yu-Shen Yang, Subarnarekha Sinha, Andreas G. Veneris, Robert K. Brayton. Automating Logic Rectification by Approximate SPFDs. In Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007. pages 402-407, IEEE, 2007. [doi]
@inproceedings{YangSVB07,
title = {Automating Logic Rectification by Approximate SPFDs},
author = {Yu-Shen Yang and Subarnarekha Sinha and Andreas G. Veneris and Robert K. Brayton},
year = {2007},
doi = {10.1109/ASPDAC.2007.358019},
url = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.358019},
tags = {logic},
researchr = {https://researchr.org/publication/YangSVB07},
cites = {0},
citedby = {0},
pages = {402-407},
booktitle = {Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007},
publisher = {IEEE},
}