Zunsong Yang, Zule Xu, Masaru Osada, Tetsuya Iizuka. A 10-GHz Inductorless Cascaded PLL with Zero-ISF Subsampling Phase Detector Achieving -63-dBc Reference Spur, 175-fs RMS Jitter and -240-dB FOMjitter. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 10-11, IEEE, 2022. [doi]
@inproceedings{YangXOI22,
title = {A 10-GHz Inductorless Cascaded PLL with Zero-ISF Subsampling Phase Detector Achieving -63-dBc Reference Spur, 175-fs RMS Jitter and -240-dB FOMjitter},
author = {Zunsong Yang and Zule Xu and Masaru Osada and Tetsuya Iizuka},
year = {2022},
doi = {10.1109/VLSITechnologyandCir46769.2022.9830382},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830382},
researchr = {https://researchr.org/publication/YangXOI22},
cites = {0},
citedby = {0},
pages = {10-11},
booktitle = {IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9772-5},
}