A systematic approach to reducing semiconductor memory test time in mass production - researchr publication authors

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Jen-Chieh Yeh, Shyr-Fen Kuo, Cheng-Wen Wu, Chih-Tsun Huang, Chao-Hsun Chen. A systematic approach to reducing semiconductor memory test time in mass production. In 13th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2005), 3-5 August 2005, Taipei, Taiwan. pages 97-102, IEEE Computer Society, 2005. [doi]

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