Design of power-aware multiplier with graceful quality-power trade-offs

Jieh-Hwang Yen, Lan-Rong Dung, Chi-Yuan Shen. Design of power-aware multiplier with graceful quality-power trade-offs. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1642-1645, IEEE, 2005. [doi]

Authors

Jieh-Hwang Yen

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Lan-Rong Dung

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Chi-Yuan Shen

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