Design of power-aware multiplier with graceful quality-power trade-offs

Jieh-Hwang Yen, Lan-Rong Dung, Chi-Yuan Shen. Design of power-aware multiplier with graceful quality-power trade-offs. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 1642-1645, IEEE, 2005. [doi]

@inproceedings{YenDS05,
  title = {Design of power-aware multiplier with graceful quality-power trade-offs},
  author = {Jieh-Hwang Yen and Lan-Rong Dung and Chi-Yuan Shen},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1464919},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1464919},
  tags = {context-aware, design},
  researchr = {https://researchr.org/publication/YenDS05},
  cites = {0},
  citedby = {0},
  pages = {1642-1645},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}