Design of a phase alignment circuit for lock in amplifiers in 1.8V-0.18μm CMOS technology

M. Yerena-Mora, O. J. Cinco-Izquierdo, María Teresa Sanz-Pascual, B. Calvo-López, A. Márquez. Design of a phase alignment circuit for lock in amplifiers in 1.8V-0.18μm CMOS technology. In 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019. pages 695-698, IEEE, 2019. [doi]

Abstract

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