Table of Contents

• A Non-Quasi Static Model for Reset Voltage Variation in Memristive DevicesMohamed Moner Al Chawa, Stavros G. Stavrinides, Carol de Benito, M. Bargallo, Rodrigo Picos. 1-4 [doi]
• A 70 GHz Small-signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 nm SiGe BiCMOS TechnologyLiang Wu, Maxim Weizel, Johann-Christoph Scheytt. 1-4 [doi]
• Tunable Wideband Amplifier at 180 GHz with 22 dB Gain and 40 GHz Bandwidth in 130 nm SiGePaul Stärke, Luca Steinweg, Corrado Carta, Frank Ellinger. 5-8 [doi]
• Reconfigurable IR-UWB Current Mode Switched Receiver for IoT ApplicationsNakisa Shams, Amin Pourvali Kakhki, Frederic Nabki. 9-12 [doi]
• MASH DDSM-Induced Spurs in a Fractional-N Frequency SynthesizerDawei Mai, Adil Dahlan, Michael Peter Kennedy. 13-16 [doi]
• Observations concerning "Horn Spurs" in a MASH-based Fractional-N CP-PLLValerio Mazzaro, Michael Peter Kennedy. 17-20 [doi]
• Energy Efficient Implementation of Machine Learning Algorithms on Hardware PlatformsMario Osta, Mohamad Alameh, Hamoud Younes, Ali Ibrahim, Maurizio Valle. 21-24 [doi]
• Microwatt power hardware implementation of machine learning algorithms on MSP430 microcontrollersSimon Heller, Peter Woias. 25-28 [doi]
• WINNER: a high speed high energy efficient Neural Network implementation for image classificationSimone Domenico Antonietta, Andrea Coluccio, Giovanna Turvani, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni. 29-32 [doi]
• PULP-NN: A Computing Library for Quantized Neural Network inference at the edge on RISC-V Based Parallel Ultra Low Power ClustersAngelo Garofalo, Manuele Rusci, Francesco Conti 0001, Davide Rossi, Luca Benini. 33-36 [doi]
• A Tile-based Fused-Layer Approach to Accelerate DCNNs on Low-Density FPGAsAhmet Erdem, Danijela Babic, Cristina Silvano. 37-40 [doi]
• DOA-based Weighted Spatial Filter Design for Sum and Difference Composite Co-ArraySho Iwazaki, Koichi Ichige. 41-44 [doi]
• Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical CommunicationVikram Jain, Christoffer Fougstedt, Per Larsson-Edefors. 45-48 [doi]
• Dilated Temporal Convolutional Neural Network Architecture with Independent Component Layer for Human Activity RecognitionMatthew Ward, Cheol-Hong Min, Hassan Salamy, Kundan Nepal. 49-52 [doi]
• Approximate Sum of Absolute Transformed Differences Hardware AcceleratorMatheus F. Stigger, Victor H. S. Lima, Leonardo Bandeira Soares, Cláudio Machado Diniz, Sergio Bampi. 53-56 [doi]
• ISFET Arrays for Lab-on-Chip Technology: A ReviewNicolas Moser, Lewis Keeble, Jesus Rodriguez-Manzano, Pantelis Georgiou. 57-60 [doi]
• A Solar-Cell-Assisted, 99.66% Biofuel Cell Area Reduced, Biofuel-Cell-Powered Wireless Biosensing System in 65-nm CMOS for Continuous Glucose Monitoring Contact LensesAtsuki Kobayashi, Kenya Hayashi, Shigeki Arata, Shunya Murakami, Cong Dang Bui, Tran Minh Quan, Md. Zahidul Islam, Kiichi Niitsu. 61-64 [doi]
• A Low-Power Embedded System for Real-Time sEMG based Event-Driven Gesture RecognitionAndrea Mongardi, Paolo Motto Ros, Fabio Rossi, Massimo Ruo Roch, Maurizio Martina, Danilo Demarchi. 65-68 [doi]
• A Neuromorphic Device for Detecting High-Frequency Oscillations in Human iEEGMohammadali Sharifshazileh, Karla Burelo, Tommaso Fedele, Johannes Sarnthein, Giacomo Indiveri. 69-72 [doi]
• Low-power hardware implementation of SNN with decision block for recognition tasksLuis A. Camuñas-Mesa, Bernabé Linares-Barranco, Teresa Serrano-Gotarredona. 73-76 [doi]
• AI Opportunities for Increased Energy Autonomy of Low Power IoT DevicesDimitri Galayko, Armine Karami, Philippe Basset, Elena Blokhina. 77-80 [doi]
• Pattern Recognition in Human Motion for Kinetic Energy HarvestingElena Blokhina, Andrii Sokolov, Xiaosi Tian, Dimitri Galayko. 81-84 [doi]
• Understanding the Impact of On-chip Communication on DNN Accelerator PerformanceRobert Guirado, Hyoukjun Kwon, Eduard Alarcón, Sergi Abadal, Tushar Krishna. 85-88 [doi]
• A Computationally Light Pruning Strategy for Single Layer Neural Networks based on Threshold FunctionEdoardo Ragusa, Christian Gianoglio, Rodolfo Zunino, Paolo Gastaldo. 89-92 [doi]
• Concept for a 16-QAM RF Transmitter on Flexible Substrate using a Graphene TechnologyChun-Yu Fan, Muh-Dey Wei, Peco Gjurovski, Mohamed Saeed Elsayed, Ahmed Hamed, Renato Negra, Burkay Uzlu, Zhenxing Wang, Daniel Neumaier. 93-94 [doi]
• Integrated Airborne Particle Matter DetectorUmberto Ferlito, Alfio Dario Grasso, Michele Vaiana, Giuseppe Bruno. 95-96 [doi]
• A Delta-Sigma Modulator With Frequency Division Multiplexing for Multi-Channel EEG Acquisition Front-endMikiyoshi Mikawa, Shohei Kawazoe, Ryuto Fukuoka, Nobuhiko Nakano. 97-100 [doi]
• Development and Implementation of an Embedded Low-Cost GNSS Receiver Emulator for UAV TestingMostafa Rizk, Ahmad Mroue, Khaled Alhaj Ali, Jamal Charara. 101-102 [doi]
• Pre-Silicon Yield Estimation using Machine Learning RegressionElena-Diana Sandru, Emilian David, Georg Pelz. 103-104 [doi]
• Minimum-Effort Design of Ultra-Low Power Interfaces for the Internet of ThingsOrazio Aiello, Paolo Crovetti, Massimo Alioto. 105-106 [doi]
• CCP: Configuration Context based Prefetching to Improve Coarse-Grained Reconfigurable Array PerformanceChen Yang 0005, Jia Hou, Yizhou Wang, Qi Zhou, Li Geng. 107-108 [doi]
• STARDUST: Optogenetics, Electrophysiology and Pharmacology with an Ultrasonically Powered DUST for Parkinson's DiseaseAmin Rashidi, SeyedSina Hosseini, Kjeld Laursen, Farshad Moradi. 109-110 [doi]
• A Self-tracked High-dielectric Wireless Power Transfer System for Neural ImplantsRupam Das, Hadi Heidari. 111-112 [doi]
• Algorithmic Level Approximate Computing for Machine Learning ClassifiersHamoud Younes, Ali Ibrahim, Mostafa Rizk, Maurizio Valle. 113-114 [doi]
• FPGA Implementation of Binarized Perceptron Learning Hardware Using CMOS Invertible LogicDuckgyu Shin, Naoya Onizawa, Takahiro Hanyu. 115-116 [doi]
• Multi-Context TCAM Based Selective Computing Architecture for a Low-Power NNRen Arakawa, Naoya Onizawa, Jean-Philippe Diguet, Takahiro Hanyu. 117-118 [doi]
• Verification of Inductive-Coupling-Based CMOS Biosensor Focusing on Dielectric Loss of β-Dispersion for Detecting Exosomes Through Electromagnetic SimulationShunya Murakami, Taiki Nakanishi, Atsuki Kobayashi, Md. Zahidul Islam, Kiichi Niitsu. 119-120 [doi]
• UAV and IoT Integration: A Flying GatewayAya Moheddine, Fabio Patrone, Mario Marchese. 121-122 [doi]
• Device-to-System Level Simulation Framework for STT-DMTJ Based Cache MemoryEsteban Garzón, Raffaele De Rose, Felice Crupi, Marco Lanuzza. 123-124 [doi]
• A Fully Quantitative Scheme With Fine-grained Tuning Method For Lightweight CNN AccelerationChen Yang 0005, Bowen Li, Yizhou Wang 0004. 125-126 [doi]
• FPGA Implementation of Approximate CORDIC Circuits for Energy Efficient ApplicationsMario Osta, Ali Ibrahim, Maurizio Valle. 127-128 [doi]
• Experimental indoor tracking testbed based on Visible Light CommunicationShuo Li, Zhan Wang, Lina Shi, Xun Zhang 0002. 129-130 [doi]
• Feature Extraction for Human-Vehicle Classification in FMCW RadarAli Rizik, Andrea Randazzo, Roberto Vio, Alessandro Delucchi, Hussein Chible, Daniele D. Caviglia. 131-132 [doi]
• Noisy Reading Correction in Low Power MPPT using Kalman FilterMohammad Haidar, Hussein Chible, Daniele D. Caviglia. 133-134 [doi]
• Integration of a Virtual Protheses with a Multichannel Tactile Feedback InterfaceHoda Fares, Strahinja Dosen, Maurizio Valle. 135-137 [doi]
• Programmable Order Multiple Feedback Band-Pass Active-RC filter for FSK TransceiverSiamak Delshadpour, Xu Zhang. 138-141 [doi]
• 10 MHz -3 dB Bandwidth 360µW Power Source-Follower Low-Pass Filter for Multi-Channel Acoustic Analog Front-End in CMOS 0.18µmElia Arturo Vallicelli, Andrea Baschirotto, Marcello De Matteis. 142-145 [doi]
• 8-GHz Low-Power Voltage-Mode Second-Order Allpass Filter in 65-nm CMOSMohamed B. Elamien, Ahmed S. Elwakil, Brent J. Maundy, Leonid Belostotski. 146-149 [doi]
• th-order Fully-Differential Super-Source-Follower Analog FilterFederico Fary, Marcello De Matteis, L. Rota, M. Arosio, Andrea Baschirotto. 150-153 [doi]
• CMOS Differential Stage with Improved DC Gain, CMRR and PSRR PerformanceAndrea Ballo, Alfio Dario Grasso, Salvatore Pennisi. 154-157 [doi]
• An Energy Aware Variation-Tolerant Writing Termination Control for STT-based Non Volatile Flip-FlopsMarco Lanuzza, Raffaele De Rose, Felice Crupi, Massimo Alioto. 158-161 [doi]
• Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion EstimationWagner Penny, Jones Goebel, Douglas Corrêa, Anderson Martins, Gabriel L. Nazar, Luciano Agostini, Daniel Palomino 0001, Marcelo Schiavon Porto, Bruno Zatt. 162-165 [doi]
• Low Power SPI Design Based on Relative Timing TechniquesGuillermo H. Makar, Francisco J. Badenas, Roberto G. Simone, Alejandro Furfaro, Kenneth S. Stevens, Roberto Suaya. 166-169 [doi]
• A 300mV-Supply, 2nW-Power, 80pF-Load CMOS Digital-Based OTA for IoT InterfacesPedro Toledo, Paolo Crovetti, Hamilton Klimach, Sergio Bampi. 170-173 [doi]
• Energy-Quality Scalable Analog-to-Digital Conversion and Machine Learning Engine in a 51.9 nJ/frame Voice Activity DetectorJinq Horng Teo, Shuai Cheng, Massimo Alioto. 174-177 [doi]
• In-Vivo Monitoring for Electrical Expression of Plant Living Parameters by an Impedance Lab SystemLee Bar-on, Sebastian Peradotto, Alessandro Sanginario, Paolo Motto Ros, Yosi Shacham-Diamand, Danilo Demarchi. 178-180 [doi]
• Instrumentation Challenges for Impedance Spectroscopy for Precision Agriculture ApplicationsMarios Sophocleous, Julius Georgiou. 181-184 [doi]
• WineNote: an IoT project to enhance the wine tasteGuillaume Ferré, Marwane Rezzouki, Christian Germain, Nathalie Toulon. 185-188 [doi]
• An IoT-based electronic price-tag for food retailMatías R. Miguez, Martin Marioni, Mario Ortiz, Gisselle Vogel, Alfredo Arnaud. 189-192 [doi]
• Inversion-Coefficient-Aware Yield Optimization of Analog CircuitsFlorin Burcea, Helmut Graeb. 193-196 [doi]
• Low Cost and High Performance Radiation Hardened Latch Design for Reliable CircuitsAmbika Prasad Shah, Michael Waltl. 197-200 [doi]
• Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar ProcessorsDouglas Maciel Cardoso, Rafael Billig Tonetto, Marcelo Brandalero, Luciano Agostini, Gabriel L. Nazar, José Rodrigo Azambuja, Antonio Carlos Schneider Beck. 201-204 [doi]
• Evaluating the Impact of Accuracy Relaxation in the Reliability of GPU Register FilesMarcio Gonçalves, Ivan Lamb, Raphael M. Brum, José Rodrigo Azambuja. 205-208 [doi]
• FBM: A Simple and Fast Algorithm for Placement LegalizationJorge Ferreira, Paulo F. Butzen, Cristina Meinhardt, Ricardo A. L. Reis. 209-212 [doi]
• Programmable Emulator of Genuinely Floating Memristive Switching DevicesZdenek Kolka, Jiri Vavra, Viera Biolková, Alon Ascoli, Ronald Tetzlaff, Dalibor Biolek. 217-220 [doi]
• Memristor CNN Model for Image DenoisingAngela Slavova. 221-224 [doi]
• Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design ToolsMarkus Fritscher, Johannes Knödtel, Marc Reichenbach, Dietmar Fey. 225-228 [doi]
• Simulation of integrate-and-fire neuron circuits using HfO2-based ferroelectric field effect transistorsBharathwaj Suresh, Martin Bertele, Evelyn T. Breyer, Philipp Klein, Halid Mulaosmanovic, Thomas Mikolajick, Stefan Slesazeck, Elisabetta Chicca. 229-232 [doi]
• Better preparation of sol-gel Thin Film optical filter in presence of SurfactantSamaria Nevarez Diaz, Orly Yadid-Pecht. 233-236 [doi]
• A Multi-Sensors Wearable System for Remote Assessment of Physiotherapy Exercises during ACL RehabilitationSalvatore Tedesco, Marco Belcastro, Oscar Manzano Torre, Pasqualino Torchia, Davide Alfieri, Liudmila Khokhlova, Brendan O'Flynn. 237-240 [doi]
• Capacitive Fingerprint Sensor for Contactless Payment CardsThomas Suwald, Thomas Rottschäfer. 241-245 [doi]
• Development of Fully Shielded Soft Inductive Tactile SensorsHongbo Wang 0002, Massimo Totaro, Lucia Beccai. 246-249 [doi]
• Low-Noise Wide-Frequency Tunable Amplifier for Bioimpedance Spectroscopy ApplicationsAlejandro Márquez, Nicolás Medrano, Belén Calvo. 250-253 [doi]
• A 11.3-ppm/°C, Two Temperature Points Trimmed Current Generator for Precise RC OscillatorsMarko Dukic, Antonio Galimberti, Marco Demicheli, Edoardo Bonizzoni. 254-257 [doi]
• Variable off-Time Peak Current Mode Control (VoT-PCMC) as method for average current regulation in Buck Converter DriversOsvaldo Gasparri, Roberto Di Lorenzo, Paolo Del Croce, Albino Pidutti, Andrea Baschirotto. 258-261 [doi]
• CMOS Low-Voltage Indirect Current Feedback Instrumentation Amplifiers With Improved PerformanceJuan M. Carrillo, Miguel Angel Domínguez, Raquel Pérez-Aloe, J. Francisco Duque-Carrillo, Carlos A. de la Cruz. 262-265 [doi]
• On-Chip Power Stage and Gate Driver for Fast Switching ApplicationsRoberto Di Lorenzo, Osvaldo Gasparri, Albino Pidutti, Paolo Del Croce, Andrea Baschirotto. 266-269 [doi]
• A Small-Reconfigurable Low-Pass Filter for Analog Front-End ReceiversFabio Kelm Pereira, Gustavo Fraidenraich, Eduardo Rodrigues de Lima. 270-273 [doi]
• Performance Comparison of a Strong-Arm Latch in Different Ultra-Scaled TechnologiesZhaochen Yin, Walter Audoglio, Marco Grassi, Piero Malcovati, Edoardo Bonizzoni. 274-277 [doi]
• Comparison of Voltage-Mode and Charge-Mode amplifiers for Interfacing piezopolymer transducers to SHM electronic systemsLorenzo Capineri, Pietro Giannelli, Giacomo Calabrese. 278-281 [doi]
• Power Management Technique Smoothing Regulated Digital Supply Between Modes Switching for Low Power Wireless Sensing ApplicationShenjie Wang. 282-285 [doi]
• Frequency Corrector Using Voltage Differencing Current Conveyor Transconductance AmplifiersRoman Sotner, Jiri Petrzela, Jan Jerabek, Lukas Langhammer. 286-289 [doi]
• A 0.6 V Current Reference Based on the MOSFET Forward-Body-Biased ZTC ConditionLuis Henrique Rodovalho, Pedro Toledo, Sergio Bampi. 290-293 [doi]
• A low-power class-AB Gm-C biquad stage in CMOS 40nm technologyFrancesco Centurelli, Pietro Monsurrò, Alessandro Trifiletti. 294-297 [doi]
• Area-Efficient Low-Power Bandpass Gm-C Filter for Epileptic Seizure Detection in 130nm CMOSRiccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti. 298-301 [doi]
• Exploiting Negative Impedance Converters to Extend the Bandwidth of LEDs for Visible Light CommunicationAmany Kassem, Izzat Darwazeh. 302-305 [doi]
• An Eight-Phase 40GHz RTWO in 28nm CMOS with Phase Noise Reduction Via Head and Tail FilteringSalvatore Galeone, Michael Peter Kennedy, Karim Ahmed, Hyman Shanan, Mike Keaveney. 306-309 [doi]
• A New 8 GHz differential 120° Tunable active phase shifter integrated in a 0.25μm BiCMOS SiGe: C technologyBhanu Pratap Singh Jadav, Jean-Marie Paillot, David Cordeau, Mariem Kanoun. 310-313 [doi]
• A Compact Inductorless 32 GHz Divide-by-2 CML Frequency Divider on 22 nm FD-SOI TechnologyZoltán Tibenszky, Richard Achilles, Simon Buhr, Corrado Carta, Frank Ellinger. 314-317 [doi]
• 7-1 Pseudo-Random Bit Sequence Generator in 65 nm standard CMOSYanlu Wang, Muh-Dey Wei, Renato Negra. 318-321 [doi]
• Low-Cost Microwave Noise Source Exploiting a BJT with Junctions in Avalanche RegimeGuendalina Simoncini, Federico Alimenti. 322-325 [doi]
• Digital Low Power Mode Control Technique for High-Frequency Synchronous DC-DC Buck ConvertersDavide Bottamedi, Nicolò Zilio, Francesco Santoro, Matteo Agostinelli. 326-329 [doi]
• Extended Battery Life in Smart Watch using Photovoltaic with Quantum Dot and Conversion SystemChongmin Lee, Sungku Yeo, Youngho Ryu, Youngjun Park. 330-333 [doi]
• Active Dual Level Gate Driver for Switching Losses Reduction in IGBTsE. Mandelli, A. Mariconti, Stefano Ruzza, Andrea Baschirotto. 334-337 [doi]
• Autonomous CMOS Power Management Integrated Circuit for Electrostatic Kinetic Energy Harvesters e-KEHAbdelkrim Bessaad, Amine Rhouni, Philippe Basset, Dimitri Galayko. 338-341 [doi]
• Mixed-Signal ASICs for X- and γ-Ray Spectroscopy in Space ApplicationsM. Gandola, Marco Grassi, F. Mele, Giuseppe Bertuccio, Piero Malcovati. 346-349 [doi]
• A Differential-Ring-Oscillator with up to 35 dBc/Hz Phase Noise Improving Amplitude Feedback Loop for Ultra Low Power SystemsPeter Toth, Hiroki Ishikuro. 350-353 [doi]
• Predicting Interferences of Switching High Voltage Devices on Mixed-Signal DesignsKatrin Hirmer, Klaus Hofmann. 354-357 [doi]
• A Hierarchical Track and Hold Circuit for High Speed ADC-Based Receivers in 22nm FDSOIDavid Cordova, Wim Cops, Yann Deval, Francois Rivet, Hervé Lapuyade, Nicolas Nodenot, Yohan Piccin. 358-361 [doi]
• A 2.77μW, 80 ppm/°C Temperature Coefficient Voltage Reference for Biomedical ImplantsFereidoon Hashemi Noshahr, Morteza Nabavi, Mohamad Sawan. 362-365 [doi]
• Chopped-Anodic-Phase Charge Balancing Method for Electrical StimulationReza Ranjandish, Alexandre Schmid. 366-369 [doi]
• Impulse-Based Asynchronous Serial Communication Protocol on Optical Fiber Link for AER SystemsAndrea De Marcellis, Guido Di Patrizio Stanchieri, P. Motto Ros, M. Martina, Danilo Demarchi, Chiara Bartolozzi, Marco Faccio, Elia Palange. 370-373 [doi]
• FPGA-Based Tactile Sensory Feedback System with Optical Fiber Data Communication Link for Prosthetic ApplicationsGuido Di Patrizio Stanchieri, M. Saleh, M. Sciulli, Andrea De Marcellis, A. Ibrahim, M. Valle, Marco Faccio, Elia Palange. 374-377 [doi]
• Compact RF CMOS 4-bit Digitally Controlled OscillatorF. Haddad, Wenceslas Rahajandraibe, Imen Ghorbel. 378-381 [doi]
• Design and testing of a CMOS Self-Biased Current SourceEvandro Bolzan, Elias Bühler Storck, Márcio C. Schneider, Carlos Galup-Montoro. 382-385 [doi]
• 2 Subthreshold Voltage Reference for Implantable DevicesÓscar Pereira-Rial, Juan M. Carrillo, P. López, Victor M. Brea, Diego Cabello. 386-389 [doi]
• An Accurate High-Voltage Supply-Referred Low-Impedance Reference-Voltage for Efficiency Enhancement of the High-Side Switching ProcessTobias Zekorn, Sebastian Strache, Ralf Wunderlich, Stefan Heinen. 390-393 [doi]
• Comparison of Top-Plate and Bottom-Plate Charge Reusing in Switched-Capacitor Power ConvertersDaljit Josh, Stefano Gregori. 394-397 [doi]
• Design of HV-CMOS Detectors in BCD Technology with Noise and Crosstalk MeasurementsIndu Yadav, Ashish Joshi, Ettore Ruscino, Valentino Liberali, Attilio Andreazza, Hitesh Shrimali. 398-401 [doi]
• RRAM Endurance and Retention: Challenges, Opportunities and Implications on Reliable DesignZainab Swaidan, Rouwaida Kanj, Johnny El Hajj, Edward Saad, Fadi J. Kurdahi. 402-405 [doi]
• FPGA-based Trigger-Synchronizer for low Frame-Jitter Signal GenerationDario Russo, Stefano Ricci. 406-409 [doi]
• 4K 120fps HEVC Temporal Scalable Encoder with Super Low DelayYuya Omori, Ken Nakamura, Takayuki Onishi, Daisuke Kobayashi, Tatsuya Osawa, Hiroe Iwasaki. 410-413 [doi]
• CoopNet: Cooperative Convolutional Neural Network for Low-Power MCUsLuca Mocerino, Andrea Calimera. 414-417 [doi]
• Drift induced rigid current shift in Ge-Rich GST Phase Change Memories in Low Resistance StateFlavio Giovanni Volpe, Alessandro Cabrini, Marco Pasotti, Guido Torelli. 418-421 [doi]
• Smart cameras everywhere: AI vision on edge with emerging memoriesAlex James, Georgios Ch. Sirakoulis, Kaushik Roy. 422-425 [doi]
• Approximate Subtractor Operator for Low-Power Video Coding Hardware AcceleratorsRafael Ferreira, Mateus Leme, Marcel Moscarelli Corrêa, Luciano Agostini, Cláudio Machado Diniz, Bruno Zatt. 426-429 [doi]
• Experimental testbed for VLC-based localization framework in 5G Internet of Radio LightLina Shi, Xun Zhang, Andrei Vladimirescu, Zhan Wang, Yue Zhang, Jintao Wang, Jorge Garcia, John Cosmas, Adam Kapovits. 430-433 [doi]
• Stochastic-Computing Based Brainwave LSI Towards an Intelligence EdgeNaoya Onizawa, Warren J. Gross, Takahiro Hanyu. 434-437 [doi]
• Neuromorphic Hardware Accelerator for SNN Inference based on STT-RAM Crossbar ArraysShruti R. Kulkarni, Deepak Vinayak Kadetotad, Shihui Yin, Jae-sun Seo, Bipin Rajendran. 438-441 [doi]
• Optimal Input-Dependent Edge-Cloud Partitioning for RNN InferenceDaniele Jahier Pagliari, Roberta Chiaro, Yukai Chen, Enrico Macii, Massimo Poncino. 442-445 [doi]
• Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFSWeixiong Jiang, Heng Yu, Xinzhe Liu, Yajun Ha. 446-449 [doi]
• HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAMJialong Liu, Mingyuan Ma, Zhenhua Zhu, Yu Wang 0002, Huazhong Yang. 450-453 [doi]
• Stochasticity in Neuromorphic Computing: Evaluating Randomness for Improved PerformanceSamuel D. Brown, Gangotree Chakma, Md Musabbir Adnan, Md Sakib Hasan, Garrett S. Rose. 454-457 [doi]
• Ultra-Low Power Silicon Neuron Circuit for Extreme-Edge Neuromorphic IntelligenceArianna Rubino, Melika Payvand, Giacomo Indiveri. 458-461 [doi]
• Chaotic Oscillator Using Coupled Memristive PairsCiyan Zheng, Jason Kamran Eshraghian, Alex James, Herbert Ho-Ching Iu. 462-465 [doi]
• Body-Bias Techniques in CMOS 22FDX® for Mixed-Signal Circuits and SystemsFriedel Gerfers, Nima Lotfi, Enne Wittenhagen, Hossein Ghafarian, Yuan Tian, Marcel Runge. 466-469 [doi]
• Continuous Time Sigma-Delta Modulator with VCO-based integrators and optimized NTF zerosVictor Medina, Leidy Mabel Alvero-Gonzalez, Eric Gutierrez, Susana Patón, Luis Hernandez. 470-473 [doi]
• High-Resolution Auto-Balancing Wheatstone-Bridge with Successive Approximation of ΔΣ-Modulated Digitally Controlled Variable ResistorTakumi Miyazaki, Shuya Nakagawa, Hiroki Ishikuro. 474-477 [doi]
• A Low Power Fast Ethernet Physical Layer TransceiverSimon Buhr, Xin Xu, Martin Kreißig, Frank Ellinger. 478-481 [doi]
• A 12 GHz All-Digital PLL with linearized chirps for FMCW RadarMarkus Kempf, Juergen Roeber, Frank Ohnhaeuser, Robert Weigel. 482-485 [doi]
• Defect-Tolerant Crossbar Training of Memristor Ternary Neural NetworksKhoa Van Pham, Tien Van Nguyen, Kyeong-Sik Min. 486-489 [doi]
• Variation-aware Binarized Memristive NetworksCorey Lammie, Olga Krestinskaya, Alex James, Mostafa Rahimi Azghadi. 490-493 [doi]
• A Continuous-time Learning Rule for Memristor-based Recurrent Neural NetworksGianluca Zoppo, Francesco Marrone, Fernando Corinto. 494-497 [doi]
• Theory of Cellular Nonlinear Networks with Analogue Dynamic MemristorsAlon Ascoli, I. Messaris, Ronald Tetzlaff, Leon O. Chua. 498-501 [doi]
• Unfolding nonlinear dynamics in computing systems with mem-elementsMauro Di Marco, Mauro Forti, Fernando Corinto, Leon O. Chua. 502-505 [doi]
• P2M: A 2MPixel CMOS Image Sensor for Soft X-Ray DetectionI. Sedgwick, F. Krivan, I. Shevyakov, M. Zimmer, Heinz Graafsma, G. Cautero, D. Giuressi, R. Menk, G. Pinaroli, L. Stebel, A. Greer, N. Guerrini, U. Pedersen, N. Tartoni, S. Y. Rah, H. J. Hyun, K. S. Kim, S. H. Kim, B. Boitrelle, F. Orsini, B. Marsh, T. Nicholls, Alessandro Marras, C. B. Wunderer, J. Correa, S. Lange, M. Kuhn. 506-509 [doi]
• A full functional Monolithic Active Pixel Sensor prototype for the CEPC vertex detectorTianya Wu, Weiguo Lu, Jianing Dong, Long Li, Wang Jia, Ran Zheng, Ping Yang, Guangming Huang, Sebastian Grinstein, Raimon Casanova, Wei Wei, Xiaomin Wei, Ying Zhang, Liang Zhang, Xiaoting Li, Zhijun Liang, Joao Guimaraes da Costa. 510-513 [doi]
• Depleted MAPS on a 110 nm CMOS CIS TechnologyRaffaele Aaron Giampaolo, Andrea Di Salvo, Lucio Pancheri, Tommaso Croci, Jonhatan Olave, Angelo Rivetti, Manuel Da Rocha Rolo, Serena Mattiazzo, Piero Giubilato. 514-517 [doi]
• Highly Integrated Galvanically Isolated Systems for Data/Power TransferEgidio Ragonese, Giuseppe Palmisano, Alessandro Parisi, Nunzio Spina. 518-521 [doi]
• Global Optimization of Reconfigurable Switched Capacitor DC-DC ConvertersGianluca Marin, Kyrylo Cherniak, Volha Subotskaya, Emanuele Bodano, Christoph Sandner, Andrea Bevilacqua. 522-525 [doi]
• Implementation of a DC/DC Converter with Stepwise Charge and Improved Battery LifetimeMatteo Pizzotti, Marco Tartagni, Aldo Romani, Rita Zappa, Stefano Corbani, Giulio Ricotti. 526-529 [doi]
• Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost ConverterMasaya Nishi, Yuichiro Nakazawa, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose. 530-533 [doi]
• An RF Wireless Power Transfer system to power battery-free devices for asset trackingRoberto La Rosa, Catherine Dehollain, Filippo Pellitteri, Rosario Miceli, Patrizia Livreri. 534-537 [doi]
• Novel Electronically Reconfigurable Filter and Its Fractional-Order CounterpartLukas Langhammer, Roman Sotner, Jan Dvorak, Jan Jerabek, Peter A. Ushakov. 538-541 [doi]
• Embedded Linear Model Predictive Control Through Mesh Adaptive Direct Search AlgorithmAlessandro Ravera, Alberto Oliveri, Matteo Lodi, Marco Storace. 542-545 [doi]
• An Analog CMOS Voltage-Controlled Phase-Shifter With A 100° Tuning Range For Telecommunication Baseband Signal ProcessingBlaise Mulliez, Olivier Bernal, Hélène Tap. 546-549 [doi]
• "Visual" Design of K-band Low-Noise Amplifier Using SiGe BiCMOS TechnologyLeonid I. Babak, Andrey A. Kokolov, Michail V. Cherkashin, Feodor I. Sheyerman. 550-553 [doi]
• Nonlinear dynamics of coupled inductor-capacitor-memristor oscillatorsZbigniew Galias. 554-557 [doi]
• Test Architecture for Fine Grained Capture Power ReductionYi Sun, Hui Jiang, Lakshmi Ramakrishnan, Matan Segal, Kundan Nepal, Jennifer Dworak, Theodore W. Manikas, R. Iris Bahar. 558-561 [doi]
• An Integrated DC/DC Converter with Online Monitoring of Hot-Carrier DegradationMatteo Pizzotti, Marco Crescentini, Andrea Natale Tallarico, Aldo Romani. 562-565 [doi]
• A Python-Verilog Toolbox for Modeling of a Hadamard Gate Based on Position-Based CMOS QubitsPanagiotis Giounanlis, Elena Blokhina, Imran Bashir, Dirk Leipold, Mike Asker, Robert Bogdan Staszewski. 566-569 [doi]
• Untestable faults identification in GPGPUs for safety-critical applicationsJosie E. Rodriguez Condia, Felipe A. da Silva, Said Hamdioui, C. Sauer, Matteo Sonza Reorda. 570-573 [doi]
• DNNLibGen: Deep Neural Network Based Fast Library GeneratorEunice Naswali, Adalberto Claudio Quiros, Pravin Chandran. 574-577 [doi]
• Error Correction System using Stochastic Numbers in Symmetric Channels and Z ChannelsRyota Ishikawa, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa. 578-581 [doi]
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• A Statistical Timing Model for CMOS Inverter in Near-threshold Region Considering Input Transition TimePeng Cao 0002, Zhiyuan Liu, Bingqian Xu, Jingjing Guo. 586-589 [doi]
• Radiation Effects in XOR Logic Gates at 16nm CMOS and FinFET TechnologyRafael N. M. Oliveira, Alan D. Lüdke, Cristina Meinhardt. 590-593 [doi]
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• Integer ConvNets on Embedded CPUs: Tools and Performance Assessment on the Cortex-A CoresValentino Peluso, Antonio Cipolletta, Francesco Vaiana, Andrea Calimera. 598-601 [doi]
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• A read/write front-end for an antifuse One-Time-Programmable memory in High Voltage Silicon-On-Insulator technologyMartina Arosio, Chiara Boffino, Sergio Morini, Dirk Priefert, Oezguer Albayrak, Viktor Boguszewicz, Andrea Baschirotto. 606-609 [doi]
• A Digital Pseudo Random Number Generator Based on a Chaotic Dynamic SystemSh. Gomar, M. Ahmadi. 610-613 [doi]
• Experimental Analysis and FPGA Implementation of the Real Valued Time Delay Neural Network Based Digital PredistortionSoner Yesil, Cansu Sen, Ali Özgür Yilmaz. 614-617 [doi]
• ProfCounter: Line-Level Cycle Counter for Xilinx OpenCL High-Level SynthesisAndré Bannwart Perina, Jürgen Becker, Vanderlei Bonato. 618-621 [doi]
• Polar Decoding Hardware ImplementationLam Vinh Qui Nguyen, Jean Dion, Nicolas Gresset. 622-625 [doi]
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• A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor MemoryMd Musabbir Adnan, Sherif Amer, Sagarvarma Sayyaparaju, Md Sakib Hasan, Garrett S. Rose. 630-633 [doi]
• Synthesizing Efficient Hardware from High-Level Functional Hardware Description LanguagesMahshid Shahmohammadian, Geoffrey Mainland. 634-637 [doi]
• FinFET Variability and Near-threshold operation: Impact on Full Adders design using XOR BlocksFabio G. Rossato G. da Silva, Cristina Meinhardt, Ricardo Augusto da Luz Reis. 638-641 [doi]
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• Versatile Hardware Generation of alpha-Stable Noise for PLC Channel EmulationKonstantina Karagianni, Vassilis Paliouras. 646-649 [doi]
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• A Configurable Pruning Gaussian Image Filter for Energy-Efficient Edge DetectionLeonardo Bandeira Soares, Eduardo Antônio César da Costa, Sergio Bampi. 666-669 [doi]
• Impulse Noise Immune Bayer Image Compression with direction estimation for Imaging SensorWonseok Lee, Yunseok Choi. 670-673 [doi]
• MRL Crossbar-Based Full Adder DesignKhaled Alhaj Ali, Mostafa Rizk, Amer Baghdadi, Jean-Philippe Diguet, Jalal Jomaah. 674-677 [doi]
• Increasing MPSoCs design space with partial-ISA processorsPedro Henrique Exenberger Becker, Jeckson Dellagostin Souza, Antonio Carlos Schneider Beck. 678-681 [doi]
• Electroforming-free BiFeO3 switches for neuromorphic computing: Spike-timing dependent plasticity (STDP) and cycle-number dependent plasticity (CNDP)Mahdi Kiani, Nan Du, Danilo Bürger, Ilona Skorupa, Ramona Ecke, Stefan E. Schulz, Heidemarie Schmidt. 682-686 [doi]
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• Digital Signal Processing Accelerator for RISC-VL. Calicchia, V. Ciotoli, Gian-Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Alberto Nannarelli, M. Re. 703-706 [doi]
• A Dedicated Hardware Implementation for Biometric Recognition based on Finger VeinsRosario Arjona, J. Costas, Iluminada Baturone. 707-710 [doi]
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• Crossbar Memory Architecture Performing Memristor Overwrite LogicKhaled Alhaj Ali, Mostafa Rizk, Amer Baghdadi, Jean-Philippe Diguet, Jalal Jomaah. 723-726 [doi]
• Phase-Change Memory Models for Deep Learning Training and InferenceS. R. Nandakumar, Irem Boybat, Vinay Joshi, Christophe Piveteau, Manuel Le Gallo, Bipin Rajendran, Abu Sebastian, Evangelos Eleftheriou. 727-730 [doi]
• Noise-induced Performance Enhancement of Variability-aware Memristor NetworksVasileios G. Ntinas, Iosif-Angelos Fyrigos, Georgios Ch. Sirakoulis, Antonio Rubio, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría. 731-734 [doi]
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• Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption FunctionsAlessandro Barenghi, William Fornaciari, Andrea Galimberti, Gerardo Pelosi, Davide Zoni. 739-742 [doi]
• An 8-bit Compact Architecture of Lesamnta-LW Hash Function for Constrained DevicesLampros Pyrgas, Paris Kitsos. 743-746 [doi]
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• Design Trade-offs in Threshold ImplementationsDusan Bozilov, Ventzislav Nikov, Vincent Rijmen. 751-754 [doi]
• Polymer Microwave Fiber: a New Communication Concept That Blends Wireless, Wireline and Optical CommunicationPatrick Reynaert, Kristof Dens, Carl D'heer, Dragan Simic, Joren Vaes, Bart Philippe, Simon Ooms. 755-758 [doi]
• A New 24 GHz Triple-Push Voltage Controlled Oscillator Architecture in 0.25μm BiCMOS SiGe: C TechnologyBhanu Pratap Singh Jadav, Jean-Marie Paillot, David Cordeau, Mariem Kanoun. 759-762 [doi]
• Low power 380μW Energy Efficient 1.8 GHz Digitally Controlled Oscillator for IoT ApplicationsMateus Moreira, Lesley Ferreira, Barbara Souza, Sandro B. Ferreira, Filipe D. Baumgratz, Sergio Bampi. 763-766 [doi]
• The Floating Point Trinity: A Multi-modal Approach to Extreme Energy-Efficiency and PerformanceFlorian Zaruba, Fabian Schuiki, Stefan Mach, Luca Benini. 767-770 [doi]
• A PULP-based Parallel Power Controller for Future Exascale SystemsAndrea Bartolini, Davide Rossi, Antonio Mastrandrea, Christian Conficoni, Simone Benatti, Andrea Tilli, Luca Benini. 771-774 [doi]
• Crypto Accelerators for Power-Efficient and Real-Time on-Chip Implementation of Secure AlgorithmsLuca Baldanzi, Luca Crocetti, Stefano Di Matteo, Luca Fanucci, Sergio Saponara, Patrice Hameau. 775-778 [doi]
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• Using Hypervisor Technology for Safe and Secure Deployment of High-Performance Multicore Platforms in Future VehiclesKai Lampka, Adam Lackorzynski. 783-786 [doi]
• Performing Memristor-Aided Logic (MAGIC) using STT-MRAMJeffry Louis, Barak Hoffer, Shahar Kvatinsky. 787-790 [doi]
• Adoption of 2T2C ferroelectric memory cells for logic operationTaras Ravsher, Halid Mulaosmanovic, Evelyn T. Breyer, Viktor Havel, Thomas Mikolajick, Stefan Slesazeck. 791-794 [doi]
• Metal ion-doped sol-gel film for emulating synaptic activity and short-term non-volatile memoryKhrystyna Nych, Eunhye Baek, Chang-Ki Baek, Bergoi Ibarlucea, Larysa Baraban, Gianaurelio Cuniberti. 795-798 [doi]
• Memristor Hardware Accelerator of Quantum ComputationsIosif-Angelos Fyrigos, Vasileios G. Ntinas, Georgios Ch. Sirakoulis, Panagiotis Dimitrakis, Ioannis Karafyllidis. 799-802 [doi]
• Resource sharing in CMOS SPAD arrays: application requirements and design solutionsLucio Pancheri. 803-806 [doi]
• A Broadband Current Sensor based on the X-Hall ArchitectureMarco Crescentini, Michele Biondi, R. Ramilli, Pier Andrea Traverso, G. P. Gibiino, Aldo Romani, Marco Tartagni, M. Marchesi, Roberto Canegallo. 807-810 [doi]
• Mixed-Signal Ionoacoustic Analog Front-End for Proton Range Verification with 24γm Precision at 0.8 Gy Bragg Peak DoseElia A. Vallicelli, Andrea Baschirotto, Sebastian Lehrack, Walter Assmann, Katia Parodi, Salvo Viola, Giorgio Riccobene, Marcello De Matteis. 811-814 [doi]
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• Transient measurements and mixed quenching, active resetting circuit for SPAD in 0.35γm high-voltage CMOS for achieving 218 McpsAlija Dervic, Bernhard Goll, Bernhard Steindl, Horst Zimmermann. 819-822 [doi]
• Nonlinearity-Induced Spurs in Fractional-N Frequency Synthesizers: State of the ArtMichael Peter Kennedy. 823-826 [doi]
• Decomposition of Drain Current In Weak, Moderate, and Strong Inversion ComponentsIgor M. Filanovsky, L. B. Oliveira, Nikolay T. Tchamov. 827-830 [doi]
• Circuits of Resistors, Diodes and Sources: Topological Conditions Sufficient to Define the State of a DiodeMaurizio Ciampa. 831-834 [doi]
• Compressed Sensing of ΔΣ StreamsSergio Callegari, Mauro Mangia, Riccardo Rovatti, Gianluca Setti. 835-838 [doi]
• Modeling of Saturable Inductors for Application in DC-DC ConvertersLuigi Solimene, Carlo Ragusa, Salvatore Musumeci, Olivier de la Barriere, Fausto Fiorillo. 839-842 [doi]
• Normalized Inductance Modeling for Ferrite Power Inductor FamiliesKateryna Stoyka, Giulia Di Capua, Nicola Femia. 843-846 [doi]
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• A low-cost online estimator for switch-mode power supplies with saturating ferrite-core inductorsMatteo Lodi, Alberto Oliveri, Marco Storace. 851-854 [doi]
• Pulse Compression Modeling for Voltage Driven Ferrite Inductors in Moderate SaturationPietro Burrascano, Stefano Laureti, Marco Ricci. 855-858 [doi]
• Analog-Mixed-Signal Simulation of DC-DC Boost-Based MPPT System Taking into Account Weather Conditions VariationsFederico Bizzarri, Angelo Brambilla, Abdelali El Aroudi. 859-862 [doi]
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