A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCU

Yoshisato Yokoyama, Yuichiro Ishii, Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi, Koji Nii. A cost effective test screening method on 40-nm 4-Mb embedded SRAM for low-power MCU. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2015, Xia'men, China, November 9-11, 2015. pages 1-4, IEEE, 2015. [doi]

Abstract

Abstract is missing.