Yoshisato Yokoyama, Koji Nii, Yuichiro Ishii, Shinji Tanaka, Kazutoshi Kobayashi. Disturbance Aware Dynamic Power Reduction in Synchronous 2RW Dual-Port 8T SRAM by Self-Adjusting Wordline Pulse Timing. J. Solid-State Circuits, 58(7):2098-2108, 2023. [doi]
@article{YokoyamaNITK23,
title = {Disturbance Aware Dynamic Power Reduction in Synchronous 2RW Dual-Port 8T SRAM by Self-Adjusting Wordline Pulse Timing},
author = {Yoshisato Yokoyama and Koji Nii and Yuichiro Ishii and Shinji Tanaka and Kazutoshi Kobayashi},
year = {2023},
doi = {10.1109/JSSC.2022.3229828},
url = {https://doi.org/10.1109/JSSC.2022.3229828},
researchr = {https://researchr.org/publication/YokoyamaNITK23},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {58},
number = {7},
pages = {2098-2108},
}