Modular Synthesis of Timed Circuits Using Partial Order Reduction

Tomohiro Yoneda, Eric Mercer, Chris Myers. Modular Synthesis of Timed Circuits Using Partial Order Reduction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A(12):2684-2692, 2002. [doi]

@article{YonedaMM02,
  title = {Modular Synthesis of Timed Circuits Using Partial Order Reduction},
  author = {Tomohiro Yoneda and Eric Mercer and Chris Myers},
  year = {2002},
  url = {http://search.ieice.org/bin/summary.php?id=e85-a_12_2684},
  researchr = {https://researchr.org/publication/YonedaMM02},
  cites = {0},
  citedby = {0},
  journal = {IEICE Trans. Fundam. Electron. Commun. Comput. Sci.},
  volume = {85-A},
  number = {12},
  pages = {2684-2692},
}