Modular Synthesis of Timed Circuits Using Partial Order Reduction

Tomohiro Yoneda, Eric Mercer, Chris Myers. Modular Synthesis of Timed Circuits Using Partial Order Reduction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 85-A(12):2684-2692, 2002. [doi]

Abstract

Abstract is missing.