Using partial orders for trace theoretic verification of asynchronous circuits

Tomohiro Yoneda, Takashi Yoshikawa. Using partial orders for trace theoretic verification of asynchronous circuits. In 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 96), March 18-21, 1996, Aizu-Wakamatsu, Fukushima, JAPAN. pages 152-163, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.