A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation

Jong-Hyeok Yoon, Muya Chang, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury. A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation. In IEEE Custom Integrated Circuits Conference, CICC 2021, Austin, TX, USA, April 25-30, 2021. pages 1-2, IEEE, 2021. [doi]

@inproceedings{YoonCKCCR21-0,
  title = {A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation},
  author = {Jong-Hyeok Yoon and Muya Chang and Win-San Khwa and Yu-Der Chih and Meng-Fan Chang and Arijit Raychowdhury},
  year = {2021},
  doi = {10.1109/CICC51472.2021.9431412},
  url = {https://doi.org/10.1109/CICC51472.2021.9431412},
  researchr = {https://researchr.org/publication/YoonCKCCR21-0},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2021, Austin, TX, USA, April 25-30, 2021},
  publisher = {IEEE},
  isbn = {978-1-7281-7581-2},
}