Soft-Error Resilient and Margin-Enhanced N-P Reversed 6T SRAM Bitcell

Shusuke Yoshimoto, Hiroshi Kawaguchi, Masahiko Yoshimoto. Soft-Error Resilient and Margin-Enhanced N-P Reversed 6T SRAM Bitcell. IEICE Transactions, 97-A(9):1945-1951, 2014. [doi]

Abstract

Abstract is missing.