Masayoshi Yoshimura, Atsuya Tsujikawa, Hiroshi Yamazaki, Toshinori Hosokawa. CRLock: A SAT and FALL Attacks Resistant Logic Locking Method at Register Transfer Level. In Luca Cassano, Sreejit Chakravarty, Alberto Bosio, editors, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2022, Austin, TX, USA, October 19-21, 2022. pages 1-6, IEEE, 2022. [doi]
Abstract is missing.