An 8b extremely area efficient threshold configuring SAR ADC with source voltage shifting technique - researchr publication related

researchr

You are not signed in
Sign in
Sign up

Kentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro. An 8b extremely area efficient threshold configuring SAR ADC with source voltage shifting technique. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014. pages 31-32, IEEE, 2014. [doi]

The following publications are possibly variants of this publication:

A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADCKentaro Yoshioka, Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro. aspdac 2013: 111-112 [doi]

runs on WebDSL