Chung-Ping Young, Chung-Chu Chia, Yen-Bor Lin. The design and transport latency analysis of a locality-aware network on chip architecture. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008. pages 1272-1275, IEEE, 2008. [doi]
@inproceedings{YoungCL08, title = {The design and transport latency analysis of a locality-aware network on chip architecture}, author = {Chung-Ping Young and Chung-Chu Chia and Yen-Bor Lin}, year = {2008}, doi = {10.1109/APCCAS.2008.4746259}, url = {http://dx.doi.org/10.1109/APCCAS.2008.4746259}, researchr = {https://researchr.org/publication/YoungCL08}, cites = {0}, citedby = {0}, pages = {1272-1275}, booktitle = {IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008}, publisher = {IEEE}, }