The following publications are possibly variants of this publication:
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- High Performance, Energy Efficiency, and Scalability With GALS Chip MultiprocessorsZhiyi Yu, Bevan M. Baas. tvlsi, 17(1):66-79, 2009. [doi]
- A Low-Area Multi-Link Interconnect Architecture for GALS Chip MultiprocessorsZhiyi Yu, Bevan M. Baas. tvlsi, 18(5):750-762, 2010. [doi]