Shimeng Yu, Yu Cao. On-chip Sparse Learning with Resistive Cross-point Array Architecture. In Alex K. Jones, Hai Helen Li, Ayse Kivilcim Coskun, Martin Margala, editors, Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20 - 22, 2015. pages 195-197, ACM, 2015. [doi]
Abstract is missing.