A 5.4-GHz reference-sampling PLL-sub-sampling DLL cascaded frequency synthesizer achieving 85.7-fs RMS jitter in 65-nm CMOS - researchr publication

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Ruixi Yu, Hongyu Ren, Li Wang, Yunbo Huang, Zunsong Yang, Xuan Guo 0003, Xiaoyu Shan, Kai Cheng, Bo Li. A 5.4-GHz reference-sampling PLL-sub-sampling DLL cascaded frequency synthesizer achieving 85.7-fs RMS jitter in 65-nm CMOS. Microelectronics Journal, 174:107225, 2026. [doi]

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