Assertion-based power/performance analysis of network processor architectures

Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 0002, Felice Balarin. Assertion-based power/performance analysis of network processor architectures. In Ninth IEEE International High-Level Design Validation and Test Workshop 2004, Sonoma Valley, CA, USA, November 10-12, 2004. pages 155-160, IEEE Computer Society, 2004. [doi]

Abstract

Abstract is missing.