Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints

Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara. Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints. In Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009. pages 793-798, IEEE, 2009. [doi]

@inproceedings{YuYCF09,
  title = {Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints},
  author = {Thomas Edison Yu and Tomokazu Yoneda and Krishnendu Chakrabarty and Hideo Fujiwara},
  year = {2009},
  doi = {10.1145/1509633.1509810},
  url = {http://doi.acm.org/10.1145/1509633.1509810},
  tags = {testing, constraints, design},
  researchr = {https://researchr.org/publication/YuYCF09},
  cites = {0},
  citedby = {0},
  pages = {793-798},
  booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-2748-2},
}