Zehong Yu, Yixiao Yang, Zhuo Su 0005, Haowei Qiu, Rui Wang 0024, Aiguo Cui, Zhan Shu, Yu Jiang 0001. MFrodo: Efficient and Memory-Sensitive Simulink Code Generation via Redundancy Elimination. IEEE Trans. on CAD of Integrated Circuits and Systems, 45(7):3455-3468, July 2026. [doi]
Abstract is missing.